real210 uboot lcd显示logo lcd驱动

* Author: Harald Welte <laforge@openmoko.org>

*

* This program is free software; you can redistribute it and/or

* modify it under the terms of the GNU General Public License as

* published by the Free Software Foundation; either version 2 of

* the License, or (at your option) any later version.

*

* This program is distributed in the hope that it will be useful,

* but WITHOUT ANY WARRANTY; without even the implied warranty of

* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

* GNU General Public License for more details.

*

* You should have received a copy of the GNU General Public License

* along with this program; if not, write to the Free Software

* Foundation, Inc., 59 Temple Place, Suite 330, Boston,

* MA 02111-1307 USA

*/

#include <common.h>

#include <video_fb.h>

#include <s5pc110.h>

#include "videomodes.h"

#include <asm/arch/regs-fb.h>

#if defined(CONFIG_VIDEO_S5PV210)

/*

* Export Graphic Device

*/

GraphicDevice smi;

#define VIDEO_MEM_SIZE 0x200000  /* 240x320x16bit = 0x25800 bytes */

extern void board_video_init(GraphicDevice *pGD);

/*******************************************************************************

*

* Init video chip with common Linux graphic modes (lilo)

*/

void *video_hw_init (void)

{

S5PC11X_FB * const fb = S5PC11X_GetBase_FB();

GraphicDevice *pGD = (GraphicDevice *)&smi;

int videomode;

unsigned long t1, hsynch, vsynch;

char *penv;

int tmp, i, bits_per_pixel;

struct ctfb_res_modes *res_mode;

struct ctfb_res_modes var_mode;

int clkval;

/* Search for video chip */

printf("Video: ");

tmp = 0;

videomode = CFG_SYS_DEFAULT_VIDEO_MODE;

/* get video mode via environment */

if ((penv = getenv ("videomode")) != NULL) {

/* deceide if it is a string */

if (penv[0] <= '9') {

videomode = (int) simple_strtoul (penv, NULL, 16);

tmp = 1;

}

} else {

tmp = 1;

}

if (tmp) {

/* parameter are vesa modes */

/* search params */

for (i = 0; i < VESA_MODES_COUNT; i++) {

if (vesa_modes[i].vesanr == videomode)

break;

}

if (i == VESA_MODES_COUNT) {

printf ("no VESA Mode found, switching to mode 0x%x ", CFG_SYS_DEFAULT_VIDEO_MODE);

i = 0;

}

res_mode = (struct ctfb_res_modes *)&res_mode_init[vesa_modes[i].resindex];

bits_per_pixel = vesa_modes[i].bits_per_pixel;

} else {

res_mode = (struct ctfb_res_modes *) &var_mode;

bits_per_pixel = video_get_params (res_mode, penv);

}

/* calculate hsynch and vsynch freq (info only) */

t1 = (res_mode->left_margin + res_mode->xres + res_mode->right_margin + res_mode->hsync_len) / 8;

t1 *= 8;

t1 *= res_mode->pixclock;

t1 /= 1000;

hsynch = 1000000000L / t1;

t1 *= (res_mode->upper_margin + res_mode->yres + res_mode->lower_margin + res_mode->vsync_len);

t1 /= 1000;

vsynch = 1000000000L / t1;

/* fill in Graphic device struct */

sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres, res_mode->yres, bits_per_pixel, (hsynch /

1000), (vsynch / 1000));

printf ("%s\n", pGD->modeIdent);

pGD->winSizeX = res_mode->xres;

pGD->winSizeY = res_mode->yres;

pGD->plnSizeX = res_mode->xres;

pGD->plnSizeY = res_mode->yres;

switch (bits_per_pixel) {

case 8:

pGD->gdfBytesPP = 1;

pGD->gdfIndex = GDF__8BIT_INDEX;

break;

case 15:

pGD->gdfBytesPP = 2;

pGD->gdfIndex = GDF_15BIT_555RGB;

break;

case 16:

pGD->gdfBytesPP = 2;

pGD->gdfIndex = GDF_16BIT_565RGB;

break;

case 24:

pGD->gdfBytesPP = 3;

pGD->gdfIndex = GDF_24BIT_888RGB;

break;

case 32:

pGD->gdfBytesPP = 4;

pGD->gdfIndex = GDF_32BIT_X888RGB;

break;

}

#if 0

/* statically configure settings */

pGD->winSizeX = pGD->plnSizeX = 240;

pGD->winSizeY = pGD->plnSizeY = 320;

pGD->gdfBytesPP = 2;

pGD->gdfIndex = GDF_16BIT_565RGB;

#endif

pGD->frameAdrs = LCD_VIDEO_ADDR;

pGD->memSize = VIDEO_MEM_SIZE;

/* Clear video memory */

memset((void *)pGD->frameAdrs, 0x00, pGD->memSize);

board_video_init(pGD);

t1 = res_mode->pixclock;

t1 /= 1000;

t1 = 1000000000L / t1;

clkval = (CONFIG_SYS_VIDEO_VCLOCK_HZ / t1) - 1;

/* 配置视频输出格式和显示使能/禁止。*/

fb->VIDCON0 = ( S3C_VIDCON0_VIDOUT_RGB | S3C_VIDCON0_PNRMODE_RGB_P |

S3C_VIDCON0_CLKVALUP_ALWAYS | S3C_VIDCON0_CLKVAL_F(clkval)|

S3C_VIDCON0_VCLKEN_NORMAL | S3C_VIDCON0_CLKDIR_DIVIDED|

S3C_VIDCON0_CLKSEL_HCLK );

/* RGB I/F控制信号。*/

fb->VIDCON1 = ( S3C_VIDCON1_IVSYNC_INVERT | S3C_VIDCON1_IHSYNC_INVERT);

/* 配置视频输出时序和显示尺寸。*/

fb->VIDTCON0 = ( S3C_VIDTCON0_VBPD(res_mode->upper_margin) |

S3C_VIDTCON0_VFPD(res_mode->lower_margin) |

S3C_VIDTCON0_VSPW(res_mode->vsync_len));

fb->VIDTCON1 = ( S3C_VIDTCON1_HBPD(res_mode->left_margin) |

S3C_VIDTCON1_HFPD(res_mode->right_margin) |

S3C_VIDTCON1_HSPW(res_mode->hsync_len));

fb->VIDTCON2 = ( S3C_VIDTCON2_LINEVAL(pGD->winSizeY - 1) |

S3C_VIDTCON2_HOZVAL(pGD->winSizeX - 1));

#if defined(LCD_VIDEO_BACKGROUND)

fb->WINCON0 = (S3C_WINCON_BPPMODE_16BPP_565 | S3C_WINCON_ENWIN_ENABLE |

S3C_WINCON_HAWSWP_ENABLE);

fb->VIDOSD0A = ( S3C_VIDOSD_LEFT_X(0) | S3C_VIDOSD_TOP_Y(0));

fb->VIDOSD0B = ( S3C_VIDOSD_RIGHT_X(pGD->winSizeX - 1) |

S3C_VIDOSD_BOTTOM_Y(pGD->winSizeY - 1));

/* 指定视频窗口0的大小控制寄存器。*/

fb->VIDOSD0C = S3C_VIDOSD_SIZE(pGD->winSizeY * pGD->winSizeX);

#endif

/* 窗口格式设置 */

fb->WINCON1 = (S3C_WINCON_BPPMODE_16BPP_565 | S3C_WINCON_ENWIN_ENABLE |

S3C_WINCON_HAWSWP_ENABLE);

/* 指定OSD图像的左上角像素的横向屏幕坐标。*/

fb->VIDOSD1A = ( S3C_VIDOSD_LEFT_X(0) | S3C_VIDOSD_TOP_Y(0));

/* 指定横屏右下角的OSD图像的像素坐标。*/

fb->VIDOSD1B = ( S3C_VIDOSD_RIGHT_X(pGD->winSizeX - 1) |

S3C_VIDOSD_BOTTOM_Y(pGD->winSizeY - 1));

#if defined(LCD_VIDEO_BACKGROUND)

fb->VIDOSD1C = ( S3C_VIDOSD_ALPHA0_R(LCD_VIDEO_BACKGROUND_ALPHA) |

S3C_VIDOSD_ALPHA0_G(LCD_VIDEO_BACKGROUND_ALPHA) | S3C_VIDOSD_ALPHA0_B(LCD_VIDEO_BACKGROUND_ALPHA) );

#endif

/* 指定视频窗口1的大小控制寄存器。*/

fb->VIDOSD1D = S3C_VIDOSD_SIZE(pGD->winSizeY * pGD->winSizeX);

fb->SHADOWCON = S3C_WINSHMAP_CH_ENABLE(1); //Enables Channel 1

#if defined(LCD_VIDEO_BACKGROUND)

/* config Display framebuffer addr for background*/

/* 指定窗口0的缓冲区起始地址寄存器，缓冲器0。*/

fb->VIDW00ADD0B0 = LCD_VIDEO_BACKGROUND_ADDR;

/* This marks the end of the frame buffer. */

/* 指定窗口0的缓冲区，缓冲区结束地址寄存器0。*/

fb->VIDW00ADD1B0 = (S3C_VIDW00ADD0B0 &0xffffffff) + (pGD->winSizeX+0) * pGD->winSizeY * (pGD->gdfBytesPP);

/* 指定窗口0的缓冲区大小寄存器。*/

fb->VIDW00ADD2= ((pGD->winSizeX * pGD->gdfBytesPP) & 0x1fff);

#endif

/* config Display framebuffer addr for console*/

fb->VIDW01ADD0B0 = pGD->frameAdrs;

/* This marks the end of the frame buffer. */

fb->VIDW01ADD1B0 = (S3C_VIDW01ADD0B0 &0xffffffff) + (pGD->winSizeX+0) * pGD->winSizeY * (pGD->gdfBytesPP);

fb->VIDW01ADD2= ((pGD->winSizeX * pGD->gdfBytesPP) & 0x1fff);

/* Enable  Display */

fb->VIDCON0 |= (S3C_VIDCON0_ENVID_ENABLE | S3C_VIDCON0_ENVID_F_ENABLE);  /* ENVID = 1  ENVID_F = 1*/

fb->TRIGCON = 3;//(TRGMODE_I80 | SWTRGCMD_I80);TRIGCON = 3

/* Enable  Display  */

//VIDCON0 |= (VIDCON0_ENVID_ENABLE | VIDCON0_ENVID_F_ENABLE);   /* ENVID = 1     ENVID_F = 1*/

//TRIGCON = (TRGMODE_I80 | SWTRGCMD_I80);  //TRIGCON = 3

printf("Video: video_hw_init complete \n");

return ((void*)&smi);

}

void video_set_lut(unsigned int index,  /* color number */

unsigned char r,     /* red */

unsigned char g,     /* green */

unsigned char b     /* blue */

) {}

#endif /* CONFIG_VIDEO_S5PV210 */

#ypf update

COBJS-$(CONFIG_VIDEO_S5PV210) += s5pv210_fb.o videomodes.o

COBJS-y += cfb_console.o

COBJS-y += ct69000.o

COBJS-y += mb862xx.o

COBJS-y += sed13806.o

#define VIDEO_INFO_X            (0)

#define VIDEO_INFO_Y            (VIDEO_FONT_HEIGHT)

{0x310, RES_MODE_640x480, 15},

{0x311, RES_MODE_640x480, 16},

{0x312, RES_MODE_640x480, 24},

{0x303, RES_MODE_800x600, 8},

{0x313, RES_MODE_800x600, 15},

{0x314, RES_MODE_800x600, 16},

{0x315, RES_MODE_800x600, 24},

{0x305, RES_MODE_1024x768, 8},

{0x316, RES_MODE_1024x768, 15},

{0x317, RES_MODE_1024x768, 16},

{0x318, RES_MODE_1024x768, 24},

{0x161, RES_MODE_1152x864, 8},

{0x162, RES_MODE_1152x864, 15},

{0x163, RES_MODE_1152x864, 16},

{0x307, RES_MODE_1280x1024, 8},

{0x319, RES_MODE_1280x1024, 15},

{0x31A, RES_MODE_1280x1024, 16},

{0x31B, RES_MODE_1280x1024, 24},

};

const struct ctfb_res_modes res_mode_init[RES_MODES_COUNT] = {

/* x  y pixclk   le  ri  up       lo   hs vs  s  vmode */

{640, 480, 39721, 40, 24, 32, 11, 96, 2, 0, FB_VMODE_NONINTERLACED},

{800, 600, 27778, 64, 24, 22, 1, 72, 2, 0, FB_VMODE_NONINTERLACED},

{1024, 768, 15384, 168, 8, 29, 3, 144, 4, 0, FB_VMODE_NONINTERLACED},

{960, 720, 13100, 160, 40, 32, 8, 80, 4, 0, FB_VMODE_NONINTERLACED},

{1152, 864, 12004, 200, 64, 32, 16, 80, 4, 0, FB_VMODE_NONINTERLACED},

{1280, 1024, 9090, 200, 48, 26, 1, 184, 3, 0, FB_VMODE_NONINTERLACED},

};

#ifndef CFG_SYS_DEFAULT_VIDEO_MODE

#define CFG_SYS_DEFAULT_VIDEO_MODE    0x311

#endif

#define RES_MODE_1024x768        2

#define RES_MODE_960_720 3

#define RES_MODE_1152x864        4

#define RES_MODE_1280x1024      5

#define RES_MODES_COUNT          6

#define VESA_MODES_COUNT 19

#include <asm/io.h>

//ypf update

//#include <s5pc110.h>

#include <video_fb.h>

#include <asm/arch/regs-fb.h>

DECLARE_GLOBAL_DATA_PTR;

#ifdef CONFIG_DRIVER_SMC911X

//smc9115_pre_init();

#endif

#ifdef CONFIG_DRIVER_DM9000

dm9000_pre_init();

#endif

writel(0x10000000, GPBCON);     //GPBCON [31:28]:output [27:0]:input

writel(0x1555, GPBPUD);//GPBPUD GPBPUD[7]:Pull-up/ down disabled GPBPUD[6:0]:Pull-down enabled

writel(0xc000, GPBDRV_SR);//GPBDRV GPBDRV[7]:4x  GPBDRV[6:0]:1x

writel(0x10010000, GPBCON);//GPBCON [31:28],[19:16]:output [27:20],[15:0]:input

writel(0x1455, GPBPUD);//GPBPUD GPBPUD[7],[4]:Pull-up/ down disabled ,GPBPUD[6:5][3:0]:Pull-down enabled

writel(0xc300, GPBDRV_SR);//GPBDRV GPBDRV[7],[4]:4x  GPBDRV[6:5][3:0]:1x

writel(0x10110000, GPBCON);//GPBCON [31:28],[23:20],[19:16]:output [27:24],[15:0]:input

writel(0x1055, GPBPUD);//GPBPUD GPBPUD[7],[5][4]:Pull-up/ down disabled ,GPBPUD[6][3:0]:Pull-down enabled

writel(0xcf00, GPBDRV_SR);//GPBDRV GPBDRV[7],[5],[4]:4x  GPBDRV[6][3:0]:1x

writel(0x1, GPD1CON);//GPD1CON [23:4]:input [3:0]:output

writel(0x54, GPD1PUD);//GPD1PUD GPD1PUD[5:4],[0]:Pull-up/ down disabled ,GPBPUD[3:1]:Pull-down enabled

writel(0x3, GPD1DRV);//GPD1DRV GPD1DRV[0]:4x  GPBDRV[5:1]:1x

writel(0x11, GPD1CON);//GPD1CON [23:8]:input [7:0]:output

writel(0x50, GPD1PUD);//GPD1PUD GPD1PUD[5:4],[1:0]:Pull-up/ down disabled ,GPBPUD[3:2]:Pull-down enabled

writel(0xf, GPD1DRV);//GPD1DRV GPD1DRV[1:0]:4x  GPBDRV[5:2]:1x

writel(0x1001, GPD0CON);//GPD0CON GPD0CON[3]，[0]:output GPD0CON[2:1]:input

writel(0x15, GPD0PUD);//GPD0PUD GPD0PUD[3]:Pull-up/ down disabled,GPD0PUD[2:0]:Pull-down enabled

writel(0xc0, GPD0DRV);//GPD0DRV GPD0DRV[3]:4x,GPD0DRV[2:0]:1x

writel(0x1000010, GPH0CON);// GPH0CON GPH0CON[6],[1]:output,GPH0CON[7],[5:2],[0]:input

writel(0x4455, GPH0PUD);// GPH0PUD GPH0PUD[6],[4]:Pull-up/ down disabled GPH0PUD[7],[5],[4:0]:Pull-down enabled

writel(0x3000, GPH0DRV);// GPH0DRV GPH0DRV[6]:4x GPH0DRV[7],[5:0]:1x

writel(0x11110000, GPBCON);//GPBCON [31:16]:output [15:0]:input

writel(0x55, GPBPUD);//GPBPUD GPBPUD[7:4]:Pull-up/ down disabled GPBPUD[3:0]:Pull-down enabled

writel(0xff00, GPBDRV_SR);//GPBDRV GPBDRV[7:4]:4x  GPBDRV[3:0]:1x

writel(0x11110100, GPBCON);//GPBCON [31:16],[11:8]:output [15:12],[7:0]:input

writel(0x55, GPBPUD);//GPBPUD GPBPUD[7:4]:Pull-up/ down disabled GPBPUD[3:0]:Pull-down enabled

writel(0xff00, GPBDRV_SR);//GPBDRV GPBDRV[7:4]:4x  GPBDRV[3:0]:1x

writel(0x80, GPBDAT);//GPBDAT GPBDAT[7]=1,GPBDAT[6:0]=0

writel(0x98, GPBDAT);//GPBDAT GPBDAT[7],[4:3]=1,GPBDAT[6:5],[2:0]=0

writel(0xb9, GPBDAT);//GPBDAT GPBDAT[7],[5:3],[0]=1,GPBDAT[6],[2:1]=0

writel(0xbb, GPBDAT);//GPBDAT GPBDAT[7],[5:3],[1:0]=1,GPBDAT[6],[2]=0

writel(0xbb, GPBDAT);//GPBDAT GPBDAT[7],[5:3],[1:0]=1,GPBDAT[6],[2]=0

writel(0xd, GPD0DAT);//GPD0DAT GPD0DAT[3:2],[0]=1,GPD0DAT[1]=0

writel(0xd1, GPH0DAT);//GPH0DAT[7:6],[4],[0]=1,GPH0DAT[5],[3:1]=0

writel(0xfb, GPBDAT);//GPBDAT GPBDAT[7:3],[1:0]=1,GPBDAT[2]=0

writel(0xff, GPBDAT);//GPBDAT GPBDAT[7:0]=1

writel(0x91, GPH0DAT);//GPH0DAT[7],[4],[0]=1,GPH0DAT[6:5],[3:1]=0

writel(0xd1, GPH0DAT);//GPH0DAT[7:6],[4],[0]=1,GPH0DAT[5],[3:1]=0

writel(0xd3, GPH0DAT);//GPH0DAT[7:6],[4],[1:0]=1,GPH0DAT[5],[3:2]=0

writel(0x22222222, GPF0CON);    //GPF0CON set GPF0[0:7] as HSYNC,VSYNC,VDEN,VCLK,VD[0:3]

writel(0x0, GPF0PUD);      //GPF0PUD set pull-up,down disable

writel(0x22222222, GPF1CON);    //set GPF1CON[7:0] as VD[11:4]

writel(0x0, GPF1PUD);      //GPF1PUD set pull-up,down disable

writel(0x22222222, GPF2CON);    //set GPF2CON[7:0] as VD[19:12]

writel(0x0, GPF2PUD);      //GPF2PUD set pull-up,down disable

writel(0x00002222, GPF3CON);    //set GPF3CON[3:0] as VD[23:20]

writel(0x0, GPF3PUD);      //GPF3PUD set pull-up,down disable

//--------- S5PC110 EVT0 needs MAX drive strength---------//

writel(0xffffffff, GPF0DRV);    //set GPF0DRV drive strength max by WJ.KIM(09.07.17)

writel(0xffffffff, GPF1DRV);    //set GPF1DRV drive strength max by WJ.KIM(09.07.17)

writel(0xffffffff, GPF2DRV);    //set GPF2DRV drive strength max by WJ.KIM(09.07.17)

writel(0x3ff, GPF3DRV);     //set GPF3DRV drive strength max by WJ.KIM(09.07.17)

//init gpio func for MMC

/* Set Initial global variables */

//s5pc110_gpio = (struct s5pc110_gpio *)S5PC110_GPIO_BASE;

//smc9115_pre_init();

//pwm_pre_init();

gd->bd->bi_arch_number = MACH_TYPE;

gd->bd->bi_boot_params = (PHYS_SDRAM_1+0x100);

return 0;

}

void board_video_init(GraphicDevice *pGD)

{

//DISPLAY_CONTROL_REG = 0x2; //DISPLAY_CONTROL output path RGB=FIMD I80=FIMD ITU=FIMD

*(volatile unsigned long *)(0xE0107008) = 0x2;

//CLK_SRC1_REG = 0x700000;  //CLK_SRC1 fimdclk = EPLL

*(volatile unsigned long *)(0xE0100204) = 0x700000;

}

void board_video_reset()

{

S5PC11X_FB * const fb = S5PC11X_GetBase_FB();

fb->WINCON1 &= ~(S3C_WINCON_BPPMODE_16BPP_565 | S3C_WINCON_ENWIN_ENABLE |

S3C_WINCON_HAWSWP_ENABLE);

}

S5PC11X_REG32  VIDCON1;

S5PC11X_REG32  VIDCON2;

S5PC11X_REG8  res1[4];

S5PC11X_REG32  VIDTCON0;

S5PC11X_REG32  VIDTCON1;

S5PC11X_REG32  VIDTCON2;

S5PC11X_REG8  res2[4];

S5PC11X_REG32  WINCON0;

S5PC11X_REG32  WINCON1;

S5PC11X_REG32  WINCON2;

S5PC11X_REG32  WINCON3;

S5PC11X_REG32  WINCON4;

S5PC11X_REG32  SHADOWCON;

S5PC11X_REG8  res3[8];

S5PC11X_REG32  VIDOSD0A;

S5PC11X_REG32  VIDOSD0B;

S5PC11X_REG32  VIDOSD0C;

S5PC11X_REG8  res4[4];

S5PC11X_REG32  VIDOSD1A;

S5PC11X_REG32  VIDOSD1B;

S5PC11X_REG32  VIDOSD1C;

S5PC11X_REG32  VIDOSD1D;

S5PC11X_REG32  VIDOSD2A;

S5PC11X_REG32  VIDOSD2B;

S5PC11X_REG32  VIDOSD2C;

S5PC11X_REG32  VIDOSD2D;

S5PC11X_REG32  VIDOSD3A;

S5PC11X_REG32  VIDOSD3B;

S5PC11X_REG32  VIDOSD3C;

S5PC11X_REG8  res5[4];

S5PC11X_REG32  VIDOSD4A;

S5PC11X_REG32  VIDOSD4B;

S5PC11X_REG32  VIDOSD4C;

S5PC11X_REG8  res6[20];

S5PC11X_REG32  VIDW00ADD0B0;

S5PC11X_REG32  VIDW00ADD0B1;

S5PC11X_REG32  VIDW01ADD0B0;

S5PC11X_REG32  VIDW01ADD0B1;

S5PC11X_REG32  VIDW02ADD0B0;

S5PC11X_REG32  VIDW02ADD0B1;

S5PC11X_REG32  VIDW03ADD0B0;

S5PC11X_REG32  VIDW03ADD0B1;

S5PC11X_REG32  VIDW04ADD0B0;

S5PC11X_REG32  VIDW04ADD0B1;

S5PC11X_REG8  res7[8];

S5PC11X_REG32  VIDW00ADD1B0;

S5PC11X_REG32  VIDW00ADD1B1;

S5PC11X_REG32  VIDW01ADD1B0;

S5PC11X_REG32  VIDW01ADD1B1;

S5PC11X_REG32  VIDW02ADD1B0;

S5PC11X_REG32  VIDW02ADD1B1;

S5PC11X_REG32  VIDW03ADD1B0;

S5PC11X_REG32  VIDW03ADD1B1;

S5PC11X_REG32  VIDW04ADD1B0;

S5PC11X_REG32  VIDW04ADD1B1;

S5PC11X_REG8  res8[8];

S5PC11X_REG32  VIDW00ADD2;

S5PC11X_REG32  VIDW01ADD2;

S5PC11X_REG32  VIDW02ADD2;

S5PC11X_REG32  VIDW03ADD2;

S5PC11X_REG32  VIDW04ADD2;

S5PC11X_REG8  res9[28];

S5PC11X_REG32  VIDINTCON0;

S5PC11X_REG32  VIDINTCON1;

S5PC11X_REG8  res10[8];

S5PC11X_REG32  W1KEYCON0;

S5PC11X_REG32  W1KEYCON1;

S5PC11X_REG32  W2KEYCON0;

S5PC11X_REG32  W2KEYCON1;

S5PC11X_REG32  W3KEYCON0;

S5PC11X_REG32  W3KEYCON1;

S5PC11X_REG32  W4KEYCON0;

S5PC11X_REG32  W4KEYCON1;

S5PC11X_REG32  W1KEYALPHA;

S5PC11X_REG32  W2KEYALPHA;

S5PC11X_REG32  W3KEYALPHA;

S5PC11X_REG32  W4KEYALPHA;

S5PC11X_REG32  DITHMODE;

S5PC11X_REG8  res11[12];

S5PC11X_REG32  WIN0MAP;

S5PC11X_REG32  WIN1MAP;

S5PC11X_REG32  WIN2MAP;

S5PC11X_REG32  WIN3MAP;

S5PC11X_REG32  WIN4MAP;

S5PC11X_REG8  res12[8];

S5PC11X_REG32  WPALCON_H;

S5PC11X_REG32  WPALCON_L;

S5PC11X_REG32  TRIGCON;

S5PC11X_REG8  res13[8];

S5PC11X_REG32  I80IFCONA0;

S5PC11X_REG32  I80IFCONA1;

S5PC11X_REG32  I80IFCONB0;

S5PC11X_REG32  I80IFCONB1;

S5PC11X_REG32  COLORGAINCON;

S5PC11X_REG8  res14[12];

S5PC11X_REG32  LDI_CMDCON0;

S5PC11X_REG32  LDI_CMDCON1;

S5PC11X_REG8  res15[8];

S5PC11X_REG32  SIFCCON0;

S5PC11X_REG32  SIFCCON1;

S5PC11X_REG32  SIFCCON2;

S5PC11X_REG32  HUECOEF00;

S5PC11X_REG32  HUECOEF01;

S5PC11X_REG32  HUECOEF10;

S5PC11X_REG32  HUECOEF11;

S5PC11X_REG32  HUEOFFSET;

S5PC11X_REG32  VIDW0ALPHA0;

S5PC11X_REG32  VIDW0ALPHA1;

S5PC11X_REG32  VIDW1ALPHA0;

S5PC11X_REG32  VIDW1ALPHA1;

S5PC11X_REG32  VIDW2ALPHA0;

S5PC11X_REG32  VIDW2ALPHA1;

S5PC11X_REG32  VIDW3ALPHA0;

S5PC11X_REG32  VIDW3ALPHA1;

S5PC11X_REG32  VIDW4ALPHA0;

S5PC11X_REG32  VIDW4ALPHA1;

S5PC11X_REG8  res16[28];

S5PC11X_REG32  BLENDEQ1;

S5PC11X_REG32  BLENDEQ2;

S5PC11X_REG32  BLENDEQ3;

S5PC11X_REG32  BLENDEQ4;

S5PC11X_REG8  res17[12];

S5PC11X_REG32  BLENDCON;

S5PC11X_REG32  W0RTQOSCON;

S5PC11X_REG32  W1RTQOSCON;

S5PC11X_REG32  W2RTQOSCON;

S5PC11X_REG32  W3RTQOSCON;

S5PC11X_REG32  W4RTQOSCON;

S5PC11X_REG8  res18[8];

S5PC11X_REG32  LDI_CMD0;

S5PC11X_REG32  LDI_CMD1;

S5PC11X_REG32  LDI_CMD2;

S5PC11X_REG32  LDI_CMD3;

S5PC11X_REG32  LDI_CMD4;

S5PC11X_REG32  LDI_CMD5;

S5PC11X_REG32  LDI_CMD6;

S5PC11X_REG32  LDI_CMD7;

S5PC11X_REG32  LDI_CMD8;

S5PC11X_REG32  LDI_CMD9;

S5PC11X_REG32  LDI_CMD10;

S5PC11X_REG32  LDI_CMD11;

S5PC11X_REG8  res19[204];

S5PC11X_REG32  GAMMALUT_01_00;

S5PC11X_REG32  GAMMALUT_03_02;

S5PC11X_REG32  GAMMALUT_05_04;

S5PC11X_REG32  GAMMALUT_07_06;

S5PC11X_REG32  GAMMALUT_09_08;

S5PC11X_REG32  GAMMALUT_11_10;

S5PC11X_REG32  GAMMALUT_13_12;

S5PC11X_REG32  GAMMALUT_15_14;

S5PC11X_REG32  GAMMALUT_17_16;

S5PC11X_REG32  GAMMALUT_19_18;

S5PC11X_REG32  GAMMALUT_21_20;

S5PC11X_REG32  GAMMALUT_23_22;

S5PC11X_REG32  GAMMALUT_25_24;

S5PC11X_REG32  GAMMALUT_27_26;

S5PC11X_REG32  GAMMALUT_29_28;

S5PC11X_REG32  GAMMALUT_31_30;

S5PC11X_REG32  GAMMALUT_33_32;

S5PC11X_REG32  GAMMALUT_35_34;

S5PC11X_REG32  GAMMALUT_37_36;

S5PC11X_REG32  GAMMALUT_39_38;

S5PC11X_REG32  GAMMALUT_41_40;

S5PC11X_REG32  GAMMALUT_43_42;

S5PC11X_REG32  GAMMALUT_45_44;

S5PC11X_REG32  GAMMALUT_47_46;

S5PC11X_REG32  GAMMALUT_49_48;

S5PC11X_REG32  GAMMALUT_51_50;

S5PC11X_REG32  GAMMALUT_53_52;

S5PC11X_REG32  GAMMALUT_55_54;

S5PC11X_REG32  GAMMALUT_57_56;

S5PC11X_REG32  GAMMALUT_59_58;

S5PC11X_REG32  GAMMALUT_61_60;

S5PC11X_REG32  GAMMALUT_63_62;

S5PC11X_REG32  GAMMALUT_xx_64;

} /*__attribute__((__packed__))*/ S5PC11X_FB;

typedef struct {

S5PC11X_REG32  GPACON;

S5PC11X_REG32  GPADAT;

S5PC11X_REG32  GPAPUD;

S5PC11X_REG32  GPACONSLP;

S5PC11X_REG32  GPAPUDSLP;

S5PC11X_REG8   res1[12];

S5PC11X_REG32  GPBCON;

S5PC11X_REG32  GPBDAT;

S5PC11X_REG32  GPBPUD;

S5PC11X_REG32  GPBCONSLP;

S5PC11X_REG32  GPBPUDSLP;

S5PC11X_REG8   res2[12];

S5PC11X_REG32  GPCCON;

S5PC11X_REG32  GPCDAT;

S5PC11X_REG32  GPCPUD;

S5PC11X_REG32  GPCCONSLP;

S5PC11X_REG32  GPCPUDSLP;

S5PC11X_REG8   res3[12];

S5PC11X_REG32  GPDCON;

S5PC11X_REG32  GPDDAT;

S5PC11X_REG32  GPDPUD;

S5PC11X_REG32  GPDCONSLP;

S5PC11X_REG32  GPDPUDSLP;

S5PC11X_REG8   res4[12];

S5PC11X_REG32  GPECON;

S5PC11X_REG32  GPEDAT;

S5PC11X_REG32  GPEPUD;

S5PC11X_REG32  GPECONSLP;

S5PC11X_REG32  GPEPUDSLP;

S5PC11X_REG8   res5[12];

S5PC11X_REG32  GPFCON;

S5PC11X_REG32  GPFDAT;

S5PC11X_REG32  GPFPUD;

S5PC11X_REG32  GPFCONSLP;

S5PC11X_REG32  GPFPUDSLP;

S5PC11X_REG8   res6[12];

S5PC11X_REG32  GPGCON;

S5PC11X_REG32  GPGDAT;

S5PC11X_REG32  GPGPUD;

S5PC11X_REG32  GPGCONSLP;

S5PC11X_REG32  GPGPUDSLP;

S5PC11X_REG8   res7[12];

S5PC11X_REG32  GPHCON0;

S5PC11X_REG32  GPHCON1;

S5PC11X_REG32  GPHDAT;

S5PC11X_REG32  GPHPUD;

S5PC11X_REG32  GPHCONSLP;

S5PC11X_REG32  GPHPUDSLP;

S5PC11X_REG8   res8[8];

S5PC11X_REG32  GPICON;

S5PC11X_REG32  GPIDAT;

S5PC11X_REG32  GPIPUD;

S5PC11X_REG32  GPICONSLP;

S5PC11X_REG32  GPIPUDSLP;

S5PC11X_REG8   res9[12];

S5PC11X_REG32  GPJCON;

S5PC11X_REG32  GPJDAT;

S5PC11X_REG32  GPJPUD;

S5PC11X_REG32  GPJCONSLP;

S5PC11X_REG32  GPJPUDSLP;

S5PC11X_REG8   res10[12];

S5PC11X_REG32  GPOCON;

S5PC11X_REG32  GPODAT;

S5PC11X_REG32  GPOPUD;

S5PC11X_REG32  GPOCONSLP;

S5PC11X_REG32  GPOPUDSLP;

S5PC11X_REG8   res11[12];

S5PC11X_REG32  GPPCON;

S5PC11X_REG32  GPPDAT;

S5PC11X_REG32  GPPPUD;

S5PC11X_REG32  GPPCONSLP;

S5PC11X_REG32  GPPPUDSLP;

S5PC11X_REG8   res12[12];

S5PC11X_REG32  GPQCON;

S5PC11X_REG32  GPQDAT;

S5PC11X_REG32  GPQPUD;

S5PC11X_REG32  GPQCONSLP;

S5PC11X_REG32  GPQPUDSLP;

S5PC11X_REG8   res13[12];

S5PC11X_REG32  SPCON;

S5PC11X_REG8   res14[28];

S5PC11X_REG32  MEM0CONSLP0;

S5PC11X_REG32  MEM0CONSLP1;

S5PC11X_REG32  MEM1CONSLP;

S5PC11X_REG8   res15[4];

S5PC11X_REG32  MEM0DRVCON;

S5PC11X_REG32  MEM1DRVCON;

S5PC11X_REG8   res16[40];

S5PC11X_REG32  EINT12CON;

S5PC11X_REG32  EINT34CON;

S5PC11X_REG32  EINT56CON;

S5PC11X_REG32  EINT78CON;

S5PC11X_REG32  EINT9CON;

S5PC11X_REG8   res17[12];

S5PC11X_REG32  EINT12FLTCON;

S5PC11X_REG32  EINT34FLTCON;

S5PC11X_REG32  EINT56FLTCON;

S5PC11X_REG32  EINT78FLTCON;

S5PC11X_REG32  EINT9FLTCON;

S5PC11X_REG8   res18[12];

S5PC11X_REG32  EINT12MASK;

S5PC11X_REG32  EINT34MASK;

S5PC11X_REG32  EINT56MASK;

S5PC11X_REG32  EINT78MASK;

S5PC11X_REG32  EINT9MASK;

S5PC11X_REG8   res19[12];

S5PC11X_REG32  EINT12PEND;

S5PC11X_REG32  EINT34PEND;

S5PC11X_REG32  EINT56PEND;

S5PC11X_REG32  EINT78PEND;

S5PC11X_REG32  EINT9PEND;

S5PC11X_REG8   res20[12];

S5PC11X_REG32  PRIORITY;

S5PC11X_REG32  SERVICE;

S5PC11X_REG32  SERVICEPEND;

S5PC11X_REG8   res21[1396];

S5PC11X_REG32  GPKCON0;

S5PC11X_REG32  GPKCON1;

S5PC11X_REG32  GPKDAT;

S5PC11X_REG32  GPKPUD;

S5PC11X_REG32  GPLCON0;

S5PC11X_REG32  GPLCON1;

S5PC11X_REG32  GPLDAT;

S5PC11X_REG32  GPLPUD;

S5PC11X_REG32  GPMCON;

S5PC11X_REG32  GPMDAT;

S5PC11X_REG32  GPMPUD;

S5PC11X_REG8   res22[4];

S5PC11X_REG32  GPNCON;

S5PC11X_REG32  GPNDAT;

S5PC11X_REG32  GPNPUD;

S5PC11X_REG8   res23[68];

S5PC11X_REG32  SPCONSLP;

S5PC11X_REG8   res24[124];

S5PC11X_REG32  EINT0CON0;

S5PC11X_REG32  EINT0CON1;

S5PC11X_REG8   res25[8];

S5PC11X_REG32  EINT0FLTCON0;

S5PC11X_REG32  EINT0FLTCON1;

S5PC11X_REG32  EINT0FLTCON2;

S5PC11X_REG32  EINT0FLTCON3;

S5PC11X_REG32  EINT0MASK;

S5PC11X_REG32  EINT0PEND;

S5PC11X_REG8   res26[8];

S5PC11X_REG32  SLPEN;

} /*__attribute__((__packed__))*/ S5PC11X_GPIO;

typedef struct {

S5PC11X_REG32  INT2AP;

S5PC11X_REG32  INT2MODEM;

S5PC11X_REG32  MIFCON;

S5PC11X_REG32  MIFPCON;

S5PC11X_REG32  MODEMINTCLR;

} /*__attribute__((__packed__))*/ S5PC11X_MODEM;

#define ELFIN_LCD_BASE     0xF8000000

#define ELFIN_FB_BASE      0xF8000000

static inline S5PC11X_FB *S5PC11X_GetBase_FB(void)

{

return (S5PC11X_LCD *)(ELFIN_FB_BASE);

}

//Enables console device for a color framebuffer

#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (640*480+1024+100)   /* 100 = slack */

#define VIDEO_FB_16BPP_WORD_SWAP

#define VIDEO_FB_16BPP_PIXEL_SWAP     //the color palette,bpp is bits per pixel

#define CONFIG_VIDEO              //Video support

#define CONFIG_VIDEO_S5PV210

#define CONFIG_VIDEO_LOGO         //display Linux Logo in upper left corner

#define CONFIG_VIDEO_BMP_LOGO        //use bmp_logo instead of linux_logo

#define CONFIG_CMD_BMP         //BMP support

//#define CONFIG_CONSOLE_EXTRA_INFO

//#define CONFIG_CONSOLE_CURSOR  //on/off drawing cursor is done with delay loop in VIDEO_TSTC_FCT

//#define CONFIG_VIDEO_BMP_GZIP      //Gzip compressed BMP image support

#define CONFIG_CMD_UNZIP

#define CONFIG_SPLASH_SCREEN    //enable splash screen support,implicitly enable U-Boot Bitmap Support.

#define CONFIG_VIDEO_SW_CURSOR

#define CONFIG_SYS_CONSOLE_IS_IN_ENV

#define CFG_VIDEO_LOGO_MAX_SIZE  (1024*768+1024+100) /* 100 = slack */

#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1024*768+1024+100) /* 100 = slack */

//#define CONFIG_VGA_AS_SINGLE_DEVICE

#define CFG_CONSOLE_INFO_QUIET

#define DEBUG_CFB_CONSOLE

#define LCD_VIDEO_ADDR        (0x48000000)    //根据开发板的内存地址配置

//#define LCD_VIDEO_ADDR         (0x57a00000)

//#define LCD_VIDEO_BACKGROUND

#if defined(LCD_VIDEO_BACKGROUND)

#define LCD_VIDEO_BACKGROUND_ADDR         (0x47f00000)

#define LCD_VIDEO_BACKGROUND_LOADADDR                  (0x47d00000)

#define LCD_VIDEO_BACKGROUND_LOADSIZE            (0x60000)

#define LCD_VIDEO_BACKGROUND_ALPHA                  (0xa)

#define LCD_VIDEO_BACKGROUND_IN_NAND

//#define LCD_VIDEO_BACKGROUND_IN_MMC

#define LCD_VIDEO_BACKGROUND_FLASH_ADDR                 (0x80000)

#endif

#define CONFIG_SYS_VIDEO_VCLOCK_HZ     (133000000)

/*for PC-keyboard*/

#define VIDEO_KBD_INIT_FCT  0       //init function for keyboard

#define VIDEO_TSTC_FCT  serial_tstc   //keyboard_tstc function

#define VIDEO_GETC_FCT  serial_getc   //keyboard_getc function

#define CONFIG_EXTRA_ENV_SETTINGS     \

"stdin=serial\0"      \

"stdout=vga\0"       \

"stderr=vga\0"

我的是logott.bmp。

方法二：

在制作图片前，请您现确认您的Linux主机上安装了Netpbm 工具包，如果没有，可以在 Netpbm主页下载源代码编译安装。

将你想要的图片裁减成160*96的JPG图片，然后用以下的脚本处理一下就好了：

#!/bin/sh

#install Netpbm first

jpegtopnm $1 | ppmquant 31 | ppmtobmp -bpp 8 > $2

使用方法： (脚本名) (待处理的JPG图片名) (输出文件名)

endif

ifeq ($(VENDOR),atmel)

LOGO_BMP= logos/atmel.bmp

endif

3:烧写uboot

下载:

tftp 0x30008000 u-boot.bin

清理下:

nand erase 0 0x60000

写进去:

nand write 0x30008000 0 0x60000